1. Field of the Invention
This invention relates to production of semiconductor devices and more particularly to a semiconductor device in which respective element regions are isolated by the semiconductor oxide and the method of manufacturing the same.
2. Description of the Prior Art
In production of semiconductor integrated circuit (IC) devices, respective element regions should be effectively isolated from each other. Oxide isolation utilizing an oxide of the semiconductor material as the isolating means has become a widely adopted technique in place of the conventional pnjunction isolation. For example, see U.S. Pat. No. 3,648,125. This oxide isolation provides an advantage that the occupation area of the isolating region can be reduced compared to the pn-conjunction isolation and hence the integration (packaging) density of the IC can be improved.
The isolating oxide region may be formed by the selective oxidation process at a high temperature utilizing a nitride film as the mask or by the anodic oxidation process in an electrolytic solution in which the oxide film is made porous and oxidation is continued through this porous film. According to the conventional technique of forming bipolar transistors in an IC, however, there is a drawback that in forming a heavily doped collector contact or sink region and making an ohmic semiconductor-metal contact through a window formed in a semiconductor oxide layer the peripheral portion of oxidized isolation regions adjacent to the heavily doped region may often be over-etched in the photoetching process for opening the collector window in the oxide layer and hence the protection effects such as high breakdown voltage or isolation by the oxidized regions may be deteriorated.
Then, the collector contact region may be short-circuited with the substrate or the leak current of the collector region may increase. Further, due to the partial thinning of the oxidized isolation regions there may be formed sharp steps in the oxidized isolation regions abutting the collector contact region. Such sharp steps may produce electrical cut-off or opening in the metal wiring layer formed thereon or pinholes or cracks in insulating layers in the case of multi-layer interconnection. Thus, the yield or the reliability of the products is greatly decreased.